Western Digital: Quantum Compute Nanofabrication Engineer — San Jose, CA, United States
Western Digital lists a Quantum Compute Nanofabrication Engineer opening in San Jose, CA, United States. The position is listed as full-time. The job description covers stakeholder management, communication.
Recruitment overview
| Organisation | Western Digital |
|---|---|
| Post / role | Quantum Compute Nanofabrication Engineer |
| Employment type | Full-time |
| Notification / job ID | REF34805W |
| Job location | San Jose, CA, United States |
| Work arrangement | On-site |
| Educational qualification | Qualification references: PhD / doctorate |
| Experience required | Mid-Senior Level |
| Salary / stipend | See employer notice for pay details |
| Last date to apply | See official notice |
About Western Digital
Western Digital develops and manufactures data-storage technology for data centres, cloud platforms and enterprise infrastructure. Its employer introduction connects this work with the need to retain, manage and access information generated by digital systems and AI applications. The business brings engineering and manufacturing together around the physical systems behind data storage. Its described purpose is to make growing volumes of information available over time, supporting the infrastructure on which other digital services depend.
The position and its setting
Western Digital lists Quantum Compute Nanofabrication Engineer in San Jose, CA, United States, under reference REF34805W. The details below separate the work described by the employer from essential conditions, preferred experience and practical preparation advice.
- Employment type: Full-time
- Employer listing date: 9 October 2026
- Business Function: R&D Engineering
- Brands: Western Digital
- Work Location: San Jose Great Oaks Headquarters
Responsibilities and work described
- We are seeking a talented researcher to join our team and drive innovative research projects in quantum computing, specifically to focus on quantum compute devices nanofabrication
- The overarching goal of the project is to translate process uniformity abilities in Western Digital into resonator and qubit performance uniformity across the wafer, and from wafer to wafer
- ESSENTIAL DUTIES AND RESPONSIBILITIES
- Leadership: and execute research projects in quantum computing superconducting qubit design and nanofabrication from wafer level nanofabrication, to device packaging, and collaborating with measurement teams in implementing design and nanofabrication process changes to drive continuous improvement
- Collaboration: with product teams to tackle novel challenges and develop innovative solutions
- Collaboration: Stay current with industry and academic trends, publishing papers and presenting at conferences
- Reporting: Develop and present detailed reports and visualizations to communicate findings, trends, and actionable insights to stakeholders at all levels
- Motivation: Highly self-motivated problem solver able to thrive in unstructured environment
- Independently pursue fundamental research, including paper writing and publishing
- Communication: written and verbal communication skills, with the ability to present complex data and insights clearly to both technical and non-technical audiences
- Analytical Skills: Demonstrated ability to quickly grasp and address challenges outside of immediate field of expertise
Essential requirements and candidate background
- Experience: chip to wafer bonding with superconducting bumps is welcome
- Required:
- Ph.D degree and post-doctoral experience in Physics, Electrical Engineering, Materials Science with focus on experimental work on superconducting qubit design, nanofabrication and metrology
- Thorough understanding of superconducting qubit design theory
- Experience: nanofabrication methods for superconducting qubits
- Experience: wafer level metrology, including SEM, TEM, AFM, XPS
- Proficiency: a wide array of programming languages, like Python, Rust, TCL, or C, and the ability to choose the right one for the task, including knowledge (or willingness to acquire knowledge) of FPGA based microcontrollers
Location, schedule and contract conditions
For this overseas or regional listing, confirm work authorisation and any location restrictions with the employer. The location does not establish visa sponsorship or permission to work remotely from India.
- Work arrangement: On-site
- Advertised location: San Jose, CA, United States
Benefits mentioned by the employer
- The salary range is what we believe to be the range of possible compensation for this role at the time of this posting
- This range may be modified in the future
- If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws
- You may also be eligible for shift differential pay, depending on the shift to which you are assigned
- You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan
- Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan
- RSU awards are also available to eligible new hires, subject to WD's Standard Terms and Conditions for Restricted Stock Unit Awards
- Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable
- Notice To Candidates: Please be aware that WD and its subsidiaries will never request payment as a condition for applying for a position or receiving an offer of employment
- Should you encounter any such requests, please report it immediately to WD Ethics Helpline or email [email protected]
Conditions requiring the complete notice
Some passages contain complex or combined conditions that have not been reduced to short eligibility statements here. Read the complete linked notice for those passages, including any alternatives, exceptions or restrictions. The concise facts above should not be treated as the full wording of every condition.
Pay and application dates
A verified salary figure is not established in this article. An online estimate for another Quantum Compute Nanofabrication Engineer vacancy is not an offer for reference REF34805W; use the employer’s own pay disclosure and recruitment communication.
A closing date is not confirmed in this article. Check the current employer page before submitting: an undated posting can change or be withdrawn.
How to apply to Western Digital
Applications follow the official employer page linked below. The source includes these application-specific points:
Open the official Western Digital posting below and match the title and reference REF34805W.
Compare your qualifications and experience with the essential conditions for the San Jose, CA, United States position, then read the preferred criteria separately.
Prepare an accurate CV and the supporting items requested in that employer’s application. Provide only information and documents you are authorised to share.
Use the employer’s application option, complete the required fields and review the submission. Retain the acknowledgement when one is provided. Job Alerts World does not receive the application.
- Accommodation requests: [email protected]
Practical preparation: Python
Python work is easier to assess through a concrete example than a list of libraries. Explain the problem, the input data, the parts you implemented and how you checked the output. Include a repository or a short technical note when you can share it.
Relevant skills
- Python
- FPGA
- stakeholder management
- communication
- electrical engineering
Important links
| Official notification / job description | Open official page |
|---|---|
| Online application portal | Open official page |
Read the complete official notice before applying. Availability and requirements can change.
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