Renesas Electronics: Senior Engineer, Design Verification (MCU) — Bengaluru, KA, India
Renesas Electronics lists a Senior Engineer, Design Verification (MCU) opening in Bengaluru, KA, India. The position is listed as full-time. The job description covers AI.
Recruitment overview
| Organisation | Renesas Electronics |
|---|---|
| Post / role | Senior Engineer, Design Verification (MCU) |
| Employment type | Full-time |
| Notification / job ID | 20034388_2026-10-12 |
| Job location | Bengaluru, KA, India |
| Work arrangement | On-site |
| Educational qualification | Degree / qualification: Bachelor’s or Master’s degree in Electronics Engineering |
| Experience required | 2 - 4 years of experience in SoC Verification domains and working knowledge of industry-standard EDA toolkits |
| Salary / stipend | See employer notice for pay details |
| Last date to apply | See official notice |
About Renesas Electronics
Renesas Electronics develops semiconductors for automotive, industrial, infrastructure and connected-device applications. Its employer description identifies microcontrollers, system-on-chip devices, analogue components and power products within its portfolio. These components form part of electronic systems made by other manufacturers. Renesas also describes combining complementary products into solutions for customers, connecting individual chips with the needs of an end application. Its business therefore involves both semiconductor technology and how that technology is used in wider electronic products.
The position and its setting
Renesas Electronics lists Senior Engineer, Design Verification (MCU) in Bengaluru, KA, India, under reference 20034388_2026-10-12. The details below separate the work described by the employer from essential conditions, preferred experience and practical preparation advice.
- Employment type: Full-time
- Employer listing date: 14 October 2026
- Brands: Renesas Electronics
Responsibilities and work described
- Be a part of end‑to‑end verification execution for SOC owning complex digital IP’s and subsystems from specification to sign‑off
- Define and drive IP‑level verification strategies, including test plans, coverage models, and closure criteria
- Development: scalable, reusable UVM‑based verification environments for IP and subsystem verification
- Leadership: functional, code, assertion, and cross‑coverage closure, ensuring high‑quality sign‑off with clear metrics
- Apply AI/ML‑assisted verification techniques to accelerate coverage convergence, identify stimulus gaps, and optimize regression efficiency
- Drive constraint random and directed test methodologies for thorough protocol, corner‑case, and stress verification
- Collaboration: with RTL, Architecture, Emulation, and SoC Verification teams to ensure seamless IP integration
- Review: IP specifications and work with architects to translate requirements into robust verification plans and checkers
- Development: and deploy advanced checkers, scoreboards, assertions (SVA), and protocol monitors
- Work: with EDA vendors to evaluate and adopt next‑generation verification, coverage, and analytics tools
- Mentor junior engineers and promote best‑in‑class verification practices and continuous improvement
- Support: Gate‑Level Simulation (GLS), low‑power verification, and post‑silicon debug when required
- Quality / delivery: IP deliverables meet quality, schedule, and reusability expectations for SoC integration
Essential requirements and candidate background
- Bachelor’s or Master’s degree in Electronics Engineering
- 2 - 4 years of experience in SoC Verification domains and working knowledge of industry-standard EDA toolkits
- Expertise in UVM-based testbench architecture and development
- Experience: metric-driven verification, including functional and code coverage closure
- Deep understanding of SystemVerilog, UVM, assertions (SVA), and verification best practices
- Experience: directed and constrained-random verification methodologies
- Experience debugging complex design issues in simulation, emulation, and post-silicon environments
- Proficiency: Verilog/SystemVerilog, with working knowledge of C/C++, and Shell scripting
- Experience: verification of MCU-based SoCs and subsystems, including CPU cores, AHB/APB/AXI bus protocols, interrupt controllers, GPIO, timers, UART, SPI, I2C, CAN, low-power features, and embedded peripherals
- Understanding: MCU architectures such as ARM Cortex-M, RISC-V, or equivalent embedded processor architectures
- Analytical, problem-solving, and communication skills
Preferred experience and additional strengths
- Knowledge: firmware-driven verification techniques and embedded software interaction with MCU peripherals is desirable
- Hands-on experience using AI/ML-based verification tools for:
- Coverage gap analysis
- Test stimulus optimization
- Regression triage and coverage acceleration
- Scripting expertise in Python, Perl, or TCL for automation and analytics
- Exposure: formal verification and hybrid formal-simulation flows
- Familiarity: high-speed or complex IPs, such as:
- H.264
- Security, debug, or safety-critical IPs
- Experience: MCU functional safety concepts (ISO 26262), low-power verification, secure boot, and embedded system validation is a plus
- Experience: firmware development/debugging in Embedded C or RTOS-based environments is desirable
Location, schedule and contract conditions
- Work arrangement: On-site
- Advertised location: Bengaluru, KA, India
Pay and application dates
A verified salary figure is not established in this article. An online estimate for another Senior Engineer, Design Verification (MCU) vacancy is not an offer for reference 20034388_2026-10-12; use the employer’s own pay disclosure and recruitment communication.
A closing date is not confirmed in this article. Check the current employer page before submitting: an undated posting can change or be withdrawn.
How to apply to Renesas Electronics
Applications follow the official employer page linked below.
Open the official Renesas Electronics posting below and match the title and reference 20034388_2026-10-12.
Compare your qualifications and experience with the essential conditions for the Bengaluru, KA, India position, then read the preferred criteria separately.
Prepare an accurate CV and the supporting items requested in that employer’s application. Provide only information and documents you are authorised to share.
Use the employer’s application option, complete the required fields and review the submission. Retain the acknowledgement when one is provided. Job Alerts World does not receive the application.
Practical preparation: Python
Python work is easier to assess through a concrete example than a list of libraries. Explain the problem, the input data, the parts you implemented and how you checked the output. Include a repository or a short technical note when you can share it.
Relevant skills
- Python
- C++
- AI/ML
- ISO
- AI
- embedded systems
- firmware
- communication
Important links
| Official notification / job description | Open official page |
|---|---|
| Online application portal | Open official page |
Read the complete official notice before applying. Availability and requirements can change.
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