Renesas Electronics: Senior Digital Design Verification Engineer — Austin, TEXAS, United States

About Renesas Electronics

Renesas Electronics develops semiconductors for automotive, industrial, infrastructure and connected-device applications. Its employer description identifies microcontrollers, system-on-chip devices, analogue components and power products within its portfolio. These components form part of electronic systems made by other manufacturers. Renesas also describes combining complementary products into solutions for customers, connecting individual chips with the needs of an end application. Its business therefore involves both semiconductor technology and how that technology is used in wider electronic products.

The position and its setting

Renesas Electronics lists Senior Digital Design Verification Engineer in Austin, TEXAS, United States, under reference 20032927_2026-09-08. The details below separate the work described by the employer from essential conditions, preferred experience and practical preparation advice.

• Employment type: Full-time
• Employer listing date: 23 October 2026
• Brands: Renesas Electronics

Responsibilities and work described

• Renesas is seeking a Senior Digital Design Verification Engineer to join our team developing complex power management SoCs
• These products integrate digital control, telemetry, fault management, communication interfaces, configurable peripherals, and advanced power-control functions for AI, datacenter, enterprise computing, networking, and high-performance power delivery applications
• Independently own verification of significant blocks and features from planning through closure
• The role combines hands-on UVM development, coverage-driven verification, complex debug, and close collaboration with architecture, RTL design, firmware, analog, validation, and systems teams
• Own verification of complex digital blocks or major SoC features from requirements analysis through coverage closure
• Development: feature-based verification plans from product, architecture, and microarchitecture specifications; identify gaps, ambiguities, corner cases, and risks
• Building: and extend reusable SystemVerilog/UVM environments, including sequences, monitors, scoreboards, checkers, assertions, and coverage models
• Development: constrained random and targeted tests for normal operation, error handling, recovery, and system-level interactions
• Drive functional, code, toggle, FSM, and assertion coverage closure using regression and coverage data
• Debug RTL, testbench, assertion, integration, and regression failures; collaborate with design and firmware teams to isolate issues and verify fixes
• Automate regression, triage, reporting, and analysis workflows using scripting and modern engineering tools
• Communicate status, risks, dependencies, and closure evidence clearly; provide technical guidance to less-experienced engineers

Essential requirements and candidate background

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
• 4 or more years of relevant digital design verification experience, or equivalent directly applicable experience
• Demonstrated ownership of a complex block, subsystem, or major feature from verification planning through closure
• Proficiency: SystemVerilog, UVM, constrained random verification, functional coverage, and SystemVerilog Assertions
• Experience translating specifications into test plans, test scenarios, checkers, scoreboards, assertions, coverage models, and closure criteria
• Hands-on experience developing and debugging reusable UVM environments and analyzing complex regression failures
• RTL and testbench debug skills, with the ability to distinguish design, environment, test, firmware, and specification issues
• Knowledge: digital design fundamentals, including state machines, clocks and resets, interrupts, register interfaces, memories, and clock-domain crossings
• Proficiency: Linux and at least one scripting language such as Python, Bash, Perl, or Tcl
• Work independently and collaborate effectively across architecture, design, firmware, analog, validation, and systems teams
• Technical ownership and a disciplined approach to verification completeness
• Reason beyond directed requirements and identify meaningful corner cases and feature interactions
• Clear communication of technical risk, progress, and signoff evidence
• A collaborative mindset and interest in improving verification methodology and productivity

Preferred experience and additional strengths

• Experience verifying complex SoCs, power management ICs, voltage regulators, digital controllers, or mixed-signal products
• Experience verifying RTL interfaces to embedded processors, memory-mapped peripherals, and firmware-controlled hardware features
• Familiarity: PMBus, AVSBus, SVID or SVI3, I2C, SPI, or similar control and communication protocols
• Understanding: telemetry, fault and alert handling, power sequencing, multiphase regulation, or digital control loops
• Experience: Cadence Xcelium, SimVision, vManager, JasperGold, Synopsys VCS, Verdi, or comparable tools
• Experience: formal verification, gate-level simulation, silicon bring-up, or pre-silicon-to-silicon correlation
• Experience improving regression infrastructure, coverage analytics, failure triage, or verification automation

Location, schedule and contract conditions

For this overseas or regional listing, confirm work authorisation and any location restrictions with the employer. The location does not establish visa sponsorship or permission to work remotely from India.

• Work arrangement: On-site
• Advertised location: Austin, TEXAS, United States

Pay and application dates

A verified salary figure is not established in this article. An online estimate for another Senior Digital Design Verification Engineer vacancy is not an offer for reference 20032927_2026-09-08; use the employer’s own pay disclosure and recruitment communication.

A closing date is not confirmed in this article. Check the current employer page before submitting: an undated posting can change or be withdrawn.

How to apply to Renesas Electronics

Applications follow the official employer page linked below.

Open the official Renesas Electronics posting below and match the title and reference 20032927_2026-09-08.

Compare your qualifications and experience with the essential conditions for the Austin, TEXAS, United States position, then read the preferred criteria separately.

Prepare an accurate CV and the supporting items requested in that employer’s application. Provide only information and documents you are authorised to share.

Use the employer’s application option, complete the required fields and review the submission. Retain the acknowledgement when one is provided. Job Alerts World does not receive the application.

Practical preparation: Python

Python work is easier to assess through a concrete example than a list of libraries. Explain the problem, the input data, the parts you implemented and how you checked the output. Include a repository or a short technical note when you can share it.

Relevant skills

• Python
• AI/ML
• ISO
• AI
• firmware
• communication
• Linux
• embedded systems
• electrical engineering